Architecture of ASIP Crypto-Processor for Dynamic Runtime Security Applications
TELKOMNIKA Indonesian Journal of Electrical Engineering • 2016
Publication Information
Authors
Mahaba saad, Khalid Youssef , Mohamed Tarek, Hala Abdel-Kader
Keywords
Cryptographic, quantitative analysis, reference model
Journal
TELKOMNIKA Indonesian Journal of Electrical Engineering
Publisher
Not Available
Volume
4
Issue
2
Pages
Not Available
publication.type
International
Paper Link
Not Available
Supplementary Materials
Not Available
Abstract
Nowadays, demands of data security are increasing, especially after introduction of wireless communications to the masses. Cryptographic algorithms are mainly used to obtain confidentiality and integrity of data in communication. Cryptography is usually referred to as “the study of secret”. Encryption is the process of converting normal text to unreadable form. There are a variety of encryption algorithms have been developed. This paper provides quantitative analysis and comparison of some symmetric key cryptographic ciphers (DES, 3DES, AES, Blowfish, RC5, and RC6). The quantitative analysis approach is a step towards optimizing the security operations for an efficient next generation family of network processors with enhanced speed and power performance. A framework will be proposed as a reference model for quantitative analysis of security algorithm mathematical and logical operations. This paper also provides a dynamic crypto processor used for selected symmetric key cryptographic ciphers and provides an implementation of 16bit cryptographic processor that performs logical operations and arithmetic operations like rotate shift left, modular addition 2^16, S_box operation, and key expansion operation on spartan6 lower power, xc6slx150L-1lfgg676 FPGA. Simulation results show that developed processor working with high Speed, low power, and low delay time.
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