This paper presents a general-purpose algorithm for mapping directed acyclic graph to any multiprocessor architecture based on finding the dominant sequence path of a graph. The algorithm aims at minimizing the total parallel processing cost including both computation and communication costs of the program graph. It has a look-ahead feature by which it finds the cost of all paths of the graph, starting from all start nodes to all finish nodes, prior to assignment then it assigns the modules of the paths to the processors according to the processor network topology. The proposed algorithm is a static heuristic algorithm