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Mostafa E. A. Ibrahim, Markus Rupp, and S. E.-D. Habib. Performance and Power Consumption Trade-offs for a VLIW DSP. IEEE Symposium on Signals, Circuits and Systems, (ISSCS’09), Pages 197-200, Iasi, Romania, July 2009.

IEEE Symposium on Signals, Circuits and Systems, (ISSCS’09), • 2009
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Publication Information
Authors Mostafa E. A. Ibrahim, Markus Rupp, and S. E.-D. Habib
Keywords Not Available
Journal IEEE Symposium on Signals, Circuits and Systems, (ISSCS’09),
Publisher IEEE
Volume 2009
Issue Not Available
Pages 197-200
publication.type International
Paper Link Open Link
Supplementary Materials Not Available
Abstract
Since performance and power consumption optimizations are crucial issues in embedded systems, it is necessary to find a trade-off between these optimization goals. This paper explores the performance and power trade-offs of VLIW processor, specifically the Texas Instruments TMS320C6416T DSP. We evaluate the effect of the global performance optimizations as well as a specific architecture feature on the power consumption of the targeted processor while running typical digital signal and image processing algorithms. We assess the specific C64x+ architecture feature, Software Pipelined Loop (SPLOOP), effect on the power consumption and the performance as well. The binaries used in this study were generated using the Texas Instrument C/C++ Compiler, which allows control over the whole set of optimizations.