Staff Members - Benha University
Design techniques for variability mitigation
• 2013
Publication Information
Authors
Shady Agwa, Eslam Yahya, Yehea Ismail
Keywords
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publication.type
International
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Supplementary Materials
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Abstract
As the fabrication technology migrated towards the nanometre scale, 22 nm and beyond,
yield enhancement has become one of the challenges facing the integrated circuits design
community. Delay and power consumption of the manufactured chips deviate from their
predesigned values due to process, voltage and temperature (PVT) variations. This
deviation can lead to a considerable loss in yield and reliability. In this paper, we classify
and survey the approaches developed to mitigate the PVT variations on the circuit and ...
yield enhancement has become one of the challenges facing the integrated circuits design
community. Delay and power consumption of the manufactured chips deviate from their
predesigned values due to process, voltage and temperature (PVT) variations. This
deviation can lead to a considerable loss in yield and reliability. In this paper, we classify
and survey the approaches developed to mitigate the PVT variations on the circuit and ...