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ASIC Design and Implementation of 25 Gigabit Ethernet Transceiver with RS_FEC

International Journal of Electrical and Electronic Engineering & Telecommunications • 2020
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Publication Information
Authors Eman Salem, Abdelhalim Zekry, and Radwa M. Tawfeek
Keywords 25Gbps Ethernet, physical layer PHY, reed solomon, FEC, VLSI technology, synopsys, ModelSim, VHDL, System on Chip (SOC) encounter, cadence, virtuoso
Journal International Journal of Electrical and Electronic Engineering & Telecommunications
Publisher ijeetc
Volume 9
Issue Not Available
Pages 8
publication.type International
Paper Link Open Link
Supplementary Materials Not Available
Abstract
Not Available
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