أعضاء هيئة التدريس - جامعة بنها
130nm Low power asynchronous AES core
Conference: Circuits and Systems (ISCAS) • 2017
معلومات البحث
المؤلفون
N El-meligy; M Amin; E Yahya and Y Ismail
الكلمات المفتاحية
Asynchronous circuits;Ciphers;Encryption;Power demand;Protocols;Standards
المجلة العلمية
Conference: Circuits and Systems (ISCAS)
الناشر
IEEE
المجلد
Not Available
العدد
Not Available
الصفحات
4
publication.type
International
رابط البحث
Open Link
المواد المرفقة
Not Available
الملخص
Internet of Things (IoT) devices are always having low power budget and high security demands. This paper describes the design and results of fabricated Advanced Encryption Standard (AES) chip in UMC 130 nm CMOS technology by using Faraday standard cells. The AES core is designed in fully QDI asynchronous circuit style. The core ciphers 128-bit data/key in 300 ns and consumes 5.47 mW.